cvkbdcpld Project Status (09/20/2013 - 11:45:58)
Project File: | cvkbdcpld.xise | Parser Errors: | No Errors
Module Name: | cvkbdcpld | Implementation State: | Fitted
Target Device: | xc9572xl-10PC44 | Errors: | No Errors
Product Version: | ISE 14.1 | Warnings: | No Warnings
Design Goal: | Balanced | Routing Results: |
Design Strategy: | Xilinx Default (unlocked) | Timing Constraints: |
Environment: | System Settings | Final Timing Score: |

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Synthesis Report | Current | Fri Sep 20 11:45:49 2013 | 0 | 0 | 0
Translation Report | Current | Fri Sep 20 11:45:58 2013 | 0 | 0 | 0
CPLD Fitter Report (Text) | Current | Fri Sep 20 11:46:02 2013 | 0 | 2 Warnings (1 new) | 1 Info (1 new)
Power Report |  |  |  |  |

Secondary Reports | [-]
Report Name | Status | Generated
Post-Fit Simulation Model Report |  |

Date Generated: 01/26/2014 - 16:11:32